Here's a more complete circuit diagram I found. The wogglebug uses two CD4046 phase-locked loop ICs each of which has two separate phase comparators and a VCO. The XOR comparator could probably be built in Audulus, but the other is an "edge controlled digital memory network" consisting of multiple flip-flops and gate control circuits. both of the 4046s are driven by a VC LFO and are interconnected in some sort of feedback circuit. I tried to follow the signal path to see if I could figure out what was actually happening but it's all a bit beyond me. I read the Richter operator's manual but it didn't add a lot of clarity.
@RobertSyrett - very cool! Love the looks you're coming up with.
One small change: the burst output was peaking above 1 (going to 2 actually) so I added a clamp expression in it to keep the gate signal in the 0-1 range.
@stschoen Score! Unfortunately I am quite baffled as well. It would be super cool to have a phase-lock loop module for a couple of modules I would like to make.
@biminiroad Good catch! I wonder how that was happening. I appreciate the kind words as well :)